Let us start by considering how we interface between one logic family and another. Generally speaking, if the logic threshold and the high and low signal values are reasonably close in the two families we won't have much trouble, though we may have limited fan-out. Thus, for example, you can drive any TTL input from any TTL output, but a logic gate from the low power LS sub-family may only be able to drive one gate from a higher-speed family.
Note that the output current capability of the 4000B/74C series of CMOS logic gates is insufficient for them to drive TTL.
One interesting incompatibility that can arise is if you try to use very slow logic as input to very fast logic. The rate at which the output from the slow gate rises is so slow that the faster gate spends (for it) a lot of time in the threshold region - a state of affairs we have already identified as dangerous. What can happen is that, because of "ripples" on top of the wave of charge that arrives at the faster gate, it makes several high/low transitions. This may not matter, but it surely will if the faster gate is part of a circuit that is counting pulses arriving from the slower one. As Horowitz and Hill point out, one cure for this behaviour can be placing an oscilloscope probe on the problematic conductor...
This kind of problem arises in various guises in logic systems: there is a systematic cure, the use of device with a Schmitt trigger input. A Schmitt trigger is a circuit with two threshold voltages, as shown in the figure, the low to high transition occurring at a higher threshold than the high to low transition. This means that any wavelets riding on the back of a slowly rising waveform can only cause multiple transitions if their magnitude is greater than the difference between the thresholds. Thus all but the most corrupted waveforms will be correctly interpreted by the Schmitt trigger. Various logic families offer particular circuits with Schmitt trigger inputs.
Where there is a mismatch between the high and low voltage values of logic families some extra component will have to be used in making the connection.
The simplest case arises when we are connecting a TTL output to a 5V CMOS gate. The problem is that the TTL logic high output is not guaranteed to be above the logic threshold of the CMOS. A permissable solution is to use a resistor to pull the TTL output up to 5V as shown in the figure. You should be aware that while this works, once a rising output has passed the normal TTL logic high level, the circuit becomes in effect an RC circuit, and so approaches 5V slowly. [See rationale for TTL output levels]
The smaller the value of this resistor, the faster the rise to 5V will be, but the greater the power consumption in the logic low state. A lower limit on the value of the resistor is put by the ability of the TTL device to sink current from it while holding the output below the threshold for the CMOS device. Examination of the output characteristics of the TTL sub-family in question will indicate what is feasible. Outputs of the TTL sub-families can sink at least 10ma without the output rising above 1V, so that a 500ohm pull-up resistor could be used, though 1000ohms would be appropriate for the LS series. However unless you are particularly concerned about speed, a 4.7K pull-up would be a typical value, economical in its power-consumption.
As an alternative, an HCT buffer can be used between TTL and CMOS, since HCT has TTL-compatible threshold levels, but swings its output rail-to-rail.
If we want to use a TTL output to drive a high-voltage CMOS input one useful option is to use an open collector TTL gate. These gates, indicated by an asterisk (*) in the catalogue, allow the user to replace normal TTL output with an external resistor, which can be taken to the high-voltage supply of the CMOS.
Note that it is generally unsafe to connect a normal TTL output to any voltage higher than 5V.
Horowitz and Hill also discuss the use of 74C/4000B chips running at 3.3 volts. These can be connected directly to TTL chips because the logic thresholds are compatible. [Remember that the logic thresholds of this series are scaled to be approximately half the power-supply voltage].
Finally, there are special level-shifting chips, such as the 14504, which can be used to translate between two logic families. These chips have two power-supply connections, which are connected to the power-supplies of chips of each family.
Let's start with one of the simplest kinds of problem - how do we use an ordinary switch as a form of input? The switch might be a push-button, or it might be part of an array of switches integrated as a key-board, or it might be a micro-switch activated by some equipment which we want to control.
A simple circuit will suffice for this purpose - we connect the switch in series with a resistance between the rails of the logic power-supply, and use the intermediate point as an input. For TTL the best arrangement is shown in the figure. You will recall from looking at the output characteristics of TTL that a TTL input sources a good fraction of a milliamp in its logic low state. The switch connected to ground is easily able to sink that current.
With CMOS logic it is possible to use either configuration with a higher-valued resistor (say 10K). However, unless power-saving is essential, it is desirable to have about a milliamp passing through the switch since the current helps to keep the switch contacts clean. If you have to use a smaller current, gold-contact switches will work well.
When using mechanical switches like this it is essential to be aware that switch contacts bounce . Inevitably, when such a switch is activated, the gate will output a number of pulses; this can obviously cause problems. (You may have met computers, microwave ovens etc. where one switch activation causes a number of letters, digits etc. to appear. - this is caused by switch bounce. ).
Where there is room, an excellent solution of the switch-bounce problem is to use a 2-pole switch activating a flip-flop. Activating the switch in one direction sets the flip-flop, the activating in the other direction resets it. With this arrangement an activation of the switch will cause exactly one transition of the output.
Another arrangement, which appears paradoxical, is to use a non-inverting gate for switch debouncing, as shown in the figure below. This circuit works because the back-coupled gate is stable either in its high state - its input is high, so its output is also high, or in its low state - its input is low, so its output is also low. Of course, when the switch is activated, a high current flows into or out of the output, but only for the few nano-seconds that it takes for the gate to change to the other state. Such events cause no damage to the gate.
If it is not possible to use a 2-pole switch thus, the combination of an RC circuit with a Schmitt trigger is effective. The time-constant of the RC circuit should be long with respect to the time for which a switch will bounce (some number of milliseconds) but short with respect to the time it is possible for the switch to be re-activated (>100 ms for manual activation). This won't work well for TTL inputs because of their current sourcing propensities - the current "dribbling out" of a TTL input will "fill up" a 0.1microfarad capacitor in a few tenths of a millisecond, and it's best to avoid using the bigger electrolytic capacitors if possible. You could however use a "555" timer of the sort we use in our train-detector circuit to provide the necessary hysteresis, though it is relatively more complex to use than a component such as the HC14.
If you are interfacing analog circuitry based on operational amplifiers to logic you will usually have the problem that such circuits operate at higher voltages than logic. There is a class of analog components purpose-built for this job, namely the comparator.
A comparator has two inputs - a positive and a negative input. The circuit measured the difference between these two inputs and produces (with the help of a pull-up resistor) a digital output, which is high or low depending on whether the difference between its inputs is positive or negative. In the circuit below a comparator is used to drive a TTL input. In effect, the open-collector output of the comparator is acting as our switch to operate the logic gate.
In the above circuit the comparator required positive and negative power connections together with a ground. Simpler-to-use comparators running on a single power supply are available, some with a +5V power supply (e.g. the 311, 339,393 or 372/4).
Since comparators are specially designed for the job, it's better to use them where possible for interfacing between analog circuitry and a logic input.
We'll deal with the subject of digital to analog convertors in a later lecture. These allow an analog signal to be input to a digital circuit as a binary number usually between 8 and 12 bits of precision.
Horowitz and Hill, in their chapter 9, "Digital Meets Analog", show a number of circuits in which an operational amplifier can drive a logic gate quite directly. Usually a resistor is needed to limit the current flowing between the op-amp and the logic gate. If this is well chosen (10k is a suitable value) it is the only component needed between the op-amp and CMOS logic, relying on the input-diode-clamps of the CMOS to provide protection of the CMOS from the (usually higher) output voltage of the op-amp. A TTL input on the other hand only has internal diode clamping to ground, so should never be exposed to high positive voltages emanating from op-amps and other circuits without some kind of clamping or other voltage limitation.
Interfacing logic to any other kind of physical phenomenon (temperature say) is normally done with a transducer that will produce an electrical analog signal which can then be input to digital logic as discussed above.
Where you have a logic system that may be subject to interference or damage from the source of an analog signal that you want to input from, it is worth considering the use of opto-isolators. An opto-isolator consists of a light-emitting diode (LED) in near proximity to a photo-diode or transistor. Passing current through the LED in a forward direction causes it to emit light which stimulates the photo-diode (or transistor) to pass current. Thus there is no electrical connection between input and output of an opto isolator; they will usually withstand a potential difference of over a 1000V between input and output without passing any current. You should consider using opto-isolators:
The figure shows the use of an opto-isolator to couple between two logic systems. However the 'HC00 gate could equally well be replaced by a transistor, or by a 555 timer - in which case either the logic high or the logic low output of the timer can be used, as well as the "discharge" output, which is in effect an open-collector output.
The fourth hardware project has an example of driving an opto-isolator input from a 555 timer - typically one has to arrange to pass about 20mA through the input. The output of the opto-isolator can be used to drive a logic gate using a suitable pull-up resistor. Horowitz & Hill have a whole page of illustrations on the use of opto-isolators (p597 in the second edition).
It's worth noting that not all opto-isolators act very fast, so that you must check that you have chosen one adequate to your needs.
Two general considerations arise in interfacing logic to the outside world.
The first of these problems is addressed by using amplifiers to increase the power-level of our signals. The second can be addressed by using some form of isolation between the logic and power circuits.
Let us begin by observing that a logic circuit can be used quite directly to drive small devices. In particular, it is quite easy to drive a LED from those logic families that have a good current-sinking ability, as we see from the figure. We can also drive a small relay - the permissible lowest value of the coil resistance can be calculated from the current-sinking abilities of the logic circuit in question, but a value greater than 200 ohms is typical. Suitable relays are likely to be SPST with a switching capability of around 1 amp. If you use an open-collector chip, you can drive a 12V relay. Incidentally, you can find open-collector logic with the ability to sink up to 300mA at 30V (e.g. the 75451), which is enough to drive a sizable relay or even a small motor. As always, when driving an inductive load from a semiconductor device, we need a diode to "clamp" to that of the power-line the voltage which the semiconductor device is subject.
Of course, a relay is in effect a (non-proportional) amplifier, so we have in fact solved the problem of causing quite a big effect in the outside world - thus we could use the contacts of the relay to operate quite a big motor, or to operate another relay that would turn on a really whopping motor.
Since we can easily drive an LED from a logic circuit, it is natural enough to consider driving an opto-isolator, because the input side of an opto-isolator is an LED. The size of the resistor to use is determined from the input-current to the opto-isolator which will be part of its specification. Two typical circuits are shown:
in the first of these, the 4N36 provides a 1-1 current transformation, so that the output, while separated from the input by the 2500-volt-proof opto-isolator, has a current-drive capability no greater than that of the logic gate. This kind of circuit provides a considerable measure of protection against damage that might occur from exposure of the output to spikes of high voltage, and also allows the grounds of the circuits to be entirely separate. The switching speed of the 4N36 is 4 micro-seconds, which is adequately fast for many purposes.
Opto-couplers that use logic-levels at both input and output are available, for example the 74OL6000 from General Instrument.
On the right we see the use of a "solid state relay" to operate a power AC circuit. These don't actually have a pair of contacts on the output, but use a solid-state switch - generally a triac. Usually these are designed to switch on or off at transitions of the AC when the voltage (turning on) or the current (turning off) is zero. This is a desirable feature, because it avoids creating electrical noise on the AC line.
So far, we have looked at circuits in which our output is activated by the logic low state. It is also possible to use the logic high state, although with TTL we are likely to need more gain in our interface to handle a given load because the current-sourcing capability of a TTL gate in a high state is less than its current-sinking capability in the low state.
One possibility is to use a field-effect transistor. Since these devices have near-infinite input impedance at DC, they match very well with the low-current CMOS devices of the 74C or 4000B series. They can, of course, be used with TTL families, though a pull-up resistor is likely to be needed to ensure that the input to the FET rises above the threshold at which the FET turns on. For TTL logic levels, even with a pull-up, the power-handling capability of this circuit will be limited by the transconductance of the FET, that is the factor-of-proportionality between change of input voltage and resulting change of output current.
Alternatively, one can drive the base of a bipolar transistor from logic gate in the high state. The next figure shows how to do this. The 1k resistor between the gate and the transistor base serves to limit the current drawn from the logic gate output in the high state, while the 1k resistor to ground ensures that the transistor doesn't "drip" current when the gate output is in the low state. Depending on circumstances, this may be dispensed with. This circuit can be adapted for use with low-current types of CMOS and TTL (74LS series etc.) by increaing the value of the resistors, with a proportionate reduction in load-current capability. If more gain is needed, a packaged Darlington pair such as the TIP106 can be used. This is the circuit used in our track-switch driver circuit, with the addition of a clamping diode for the inductive load.
One reason why TTL is not designed to have a 5V logic high - a TTL circuit is able to swing its output fast because it uses two transistors, one to pull it up and the other to pull it down. However, using a symmetrical pair of transistors (NPN and PNP) to give a near rail-to-rail swing in a manner analogous to a CMOS output was just not technologically feasible when TTL evolved.